Impact of NBTI Stress on VDMOSFET Regions

Authors

  • Sidi Mohammed Merah Microelectronics and Microsystems Team, Laboratory of Electrification of industrials enterprises Faculty of Hydrocarbons and Chemistry, University of Boumerdes, Algeria
  • Bouchra Nadji Microelectronics and Microsystems Team, Laboratory of Electrification of industrials enterprises Faculty of Hydrocarbons and Chemistry, University of Boumerdes, Algeria

DOI:

https://doi.org/10.51485/ajss.v3i2.60

Keywords:

VDMOSFET regions, C-V, NBTI

Abstract

In this paper, we investigate the impact of negative bias temperature instability (NBTI) degradation on both channel and drain regions, of commercial power double diffused MOS transistor (VDMOSFET), using capacitance-voltage method (C-V). We report that the degradation is important at channel (drain) region in p-channel VDMOSFET (n-channel VDMOSFET). That means that the phosphorus doped region (n-type) is more sensitive to NBTI stress.

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Published

2018-06-15

How to Cite

[1]
Merah, S.M. and Nadji, B. 2018. Impact of NBTI Stress on VDMOSFET Regions. Algerian Journal of Signals and Systems . 3, 2 (Jun. 2018), 65-69. DOI:https://doi.org/10.51485/ajss.v3i2.60.

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Articles